The invention relates generally to liquid crystal displays (LCDs) and, more particularly, to the formation of copper electrodes and conductive lines on polycrystalline silicon thin-film transistor (TFT) LCDs.
Liquid crystal displays (LCDs) have a large number of pixel elements or pixels arranged in a rectangular array. Each pixel is controlled by an active device, preferably a thin film transistor (TFT). Driver circuitry which controls the display is connected to individual pixel TFTs by a grid of metal lines arranged in rows and columns. In active matrix LCDs each pixel is individually addressable. One set of parallel lines ("gate lines") is operatively connected to the gates of the TFTs in the pixel array. The intersecting lines are connected to the source or drain of each TFT (referred to herein, for convenience, as the "source lines"). The other source/drain electrode of each TFT, the one not connected to the source line, is coupled to a pixel electrode, which is energized when the TFT is turned on.
A limitation on the development and manufacture of large area LCD panels is high resistivity in the metal gate and source lines used to address individual pixels of the display. Aluminum and aluminum alloys have are often used for gate and source lines because of relatively low resistivity (3-4 .mu..OMEGA.-cm). But Aluminum presents processing problems associated with hillock formation. Other metals such as tantalum or chromium present different problems such as higher resistivity.
Gate and source line resistance becomes an increasing problem as LCDs grow in size. Line resistance produces attenuation and distortion of signal pulses, causing non-uniform images and variations in brightness. Changing to wider or thicker lines is not an option in many LCD applications. Wider gate and source lines reduces the pixel apertures on an LCD. Increasing the thickness of the metal lines presents processing difficulties. Because LCD panels have interconnect lines which are much longer than those in integrated circuit (IC) chips, the problems of line resistivity are more severe in LCDs than in ICs.
Copper metal interconnects are now used in ICs and the problems and benefits associated with copper processing are now known. The advantage of copper over aluminum and other metals used in semiconductor processing is that copper has low resistivity (1.78 .mu..OMEGA.-cm). But it is very difficult to use. Copper adheres poorly to oxides and glass. Pollutants from copper severely degrade the silicon in thin film transistor (TFT) channel regions, reducing minority carrier lifetimes and severely degrading device performance. The heating steps necessary in IC and many LCD manufacturing processes increases the rate and severity of copper diffusion into adjacent silicon regions. A solution to both the adhesion and diffusion problems is to cap or enclose the copper in a barrier material.
Copper conductors have been used in amorphous silicon TFT LCDs. Amorphous silicon TFTs use a bottom gate architecture with silicon nitride (SiN) as a gate insulator. Such amorphous silicon TFTs have proved feasible in part because silicon nitride acts as an effective diffusion barrier, even during the heating steps required for processing the TFTs. Such a bottom-gate architecture is incompatible with polycrystalline silicon TFTs because the metal conductors are deposited first and the temperatures required to crystallize the silicon melts the metal. Polycrystalline silicon (also known as "polysilicon" or "poly-Si") TFTs have advantages in performance over amorphous silicon TFTs due to polycrystalline silicon's higher carrier mobility's. But to use polycrystalline silicon, it is necessary to use a top-gate TFT architecture, which allows the silicon applied to the glass substrate to be crystallized prior to application of the metal electrodes and the gate and source lines.
In top-gate TFTs formed in polycrystalline silicon, the preferred gate insulator is silicon dioxide, which avoids the excessive defect densities associated with silicon nitride. Silicon dioxide, however, is not as effective a diffusion barrier for copper as is silicon nitride. That is one reason copper gates have not heretofore been used in polycrystalline silicon TFTs. Another reason is the poor adhesion between copper and silicon dioxide.
It would be advantageous to have a process for forming TFTs in polycrystalline silicon on LCDs which uses copper gate and source lines, taking advantage of copper's low resistivity compared with aluminum and most other metals.
It would also be advantageous have a method of forming copper metal gate and source/drain electrodes on LCD TFTs formed in polycrystalline silicon which uses wet etch processes for defining the metal regions on the pixel array, including the gate and source lines.
Accordingly, a liquid crystal display (LCD) structure having a plurality of thin film transistors (TFTs) and operative interconnections formed on a substrate is provided in the present invention. The structure comprises a plurality of active areas of polycrystalline silicon formed on the LCD substrate, which is preferably glass or the like. Each active area includes source, drain, and channel regions of a TFT. A gate electrode on each active area is formed adjacent the channel region. Source and drain electrodes are formed on the respective source and drain regions of each active area. A plurality of conductive lines are formed on the substrate to provide operative interconnections to selected TFTs on the substrate. The conductive lines include a plurality of first conductive lines operatively connected to the gate electrodes and a plurality of second conductive lines operatively connected to a second electrode of each selected TFT. The second electrode is either the source or drain electrode. The other of the source or drain electrodes, not operatively connected to the second conductive lines, is preferably connected to a transparent pixel electrode. The first and second conductive lines on the substrate, and the respective gate and second electrodes to which the lines are operatively connected on each TFT, are multi-layer structures having first/second/third layers as follows: TiN/Cu/TiN.
The preferred cross-sectional dimensions of the structure of the conductive lines and electrodes used in the LCD structure of the present invention is as follows. The first TiN layer has a thickness generally in the range of 100 .ANG. to 1,500 .ANG.. The second copper layer has a thickness generally in the range of 1000 .ANG. to 10,000 .ANG.. And the third TiN layer has a thickness generally in the range of 100 .ANG. to 1,500 .ANG..
The LCD structure is formed in accordance with the method of the present invention. The method is used to form a LCD structure on a LCD substrate having a layer of polycrystalline silicon formed on a surface thereof The method comprises the following steps. A plurality of thin film transistor structures is provided by patterning the polycrystalline silicon on the substrate. The patterning forms a plurality of active areas on the substrate. Each active area is formed by forming source drain and channel regions and depositing a gate dielectric on each channel region. A first conductive layer or conductor is then deposited on the substrate and the structures which have already been formed on the substrate. The first conductor has first/second/third layers as follows: TiN/Cu/TiN. The first conductor is then patterned to form a plurality of first conductive lines on the substrate and to form a first electrode on each TFT structure. The lines and electrodes have TiN/Cu/TiN first/second/third layers. A dielectric layer is then deposited over the structures formed thus far and patterned to provide inter-conductor isolation. Then a second conductor is deposited on the substrate and structures. The second conductor has first/second/third layers as follows: TiN/Cu/TiN. Finally, the second conductor is patterned to form a plurality of second conductive lines on the substrate and to form a second electrode on each TFT structure. The second lines and electrodes have TiN/Cu/TiN first/second/third layers.
In the preferred embodiment of the invention the step of depositing the first conductor on the substrate and structures includes the following steps. The first layer of TiN is deposited by physical vapor deposition (PVD), alternatively known as sputtering. Then a second layer of copper is deposited on the first layer of TiN by chemical vapor deposition (CVD). Then a third layer of TiN is deposited on the second layer of copper by PVD.
The thickness of each of the various layers deposited during the steps of depositing the first and second conductors is preferably within the following ranges. The first layer of TiN is deposited to a thickness generally in the range of 100 .ANG. to 1,500 .ANG.. The second layer of copper is deposited to a thickness generally in the range of 1000 .ANG. to 10,000 .ANG. on the first layer of TiN. And the third layer of TiN is deposited to a thickness generally in the range of 100 .ANG. to 1,500 .ANG. on the second layer of copper.
The steps of patterning the first conductor (TiN/Cu/TiN) and the second conductor (TiN/Cu/TiN) is preferably carried out by a wet etch process wherein photoresist is first deposited and patterned on the top surface of the conductor. Then the first TiN layer is removed by etching with a TiN etchant. Then the second Cu layer is removed by etching with a copper etchant. Then the third layer (TiN) is removed by etching with a TiN etchant. Finally, the photoresist is removed from the surface of the unetched areas.
The method also provides for the deposition of a third electrode deposited generally simultaneously with the electrode connected to the source or drain of the TFT, to provide an operative connection to a pixel electrode.